I'm chewing my way through "BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 16h Models 30h-3Fh Processors " and just can't undestand some bits about picture generation by internal graphic unit.
I would like to know how exactly is picture frame data acquired from RAM and whether I can detect particular burst access from hardware. All I could find about that are few sentences and those were in RAM section under stutter mode:
220.127.116.11 Stutter Mode
DRAM is most commonly placed in self-refresh due to stutter mode when the internal GPU is in use. The
display buffer in the GPU is a combination of a large buffer known as the DMIF (Display Memory Interface
FIFO) and a smaller line buffer. The DMIF takes data originating from DRAM and sends it to the line buffer to
draw to the screen.
And that's all there is on that matter. What I would like to know is whether I can know how deep the DMIF is and which was the last location that was acquired.
It would be also nice to be able to get an interrupt before DMIF filling starts, for example. Or how does it get filled, allthough there are some registers within MCT sections that might be for that, if there are no other, more specialised registers.
Since those thingies have just one DRAM channel ( 64-bit access), it would be nice to economise with bandwidth by doing animation synchronised with picture frame reading.