This a question about whether it is possible to restart the GPU within an A8-5500 (Radeon HD 7560D), if the bios does not dealt with it. This is an HP P7-1414 and they nobbled it to prevent using the iGPU and external PCIe together, and that is plain annoying. This is Linux, but I imagine this might help some Mac and Win folks too.
The machine is old so I'm happy to hack it. I managed to wake up the GPU interface (setpci -d 1022:1410 7C.l=0) before boot, and the PCI address 0:0:1 appears with a completely unknown PCI id (1022:1411), and the assignment of a PCI-PCI bridge. Clearly this is the logic that is the gatekeeper for the integrated package. The kernel will only go so far before it complains about an invalid bus (clearly, 2 buses no devices!). See Below.
lspci -H1 -t
pcilib: Bus 00 seen twice (firmware bug). Ignored.
My goal is simply to use the GPU for calculations (~400Gflops?), so I'm not at all bothered about graphics. I'm *specifically* interested in comparing the performance over the integrated buses vs remote device (I have a Quadro plugged in remote, similar maths capability). The latency in particular.
I'm assuming that the wakeup protocol is probably in the display drivers, but I would appreciate some guidance if this is the right mechanism, or if there is a proper engineering guidance. I understand the value 7C.l=0x39d5e86b will reset the Radeon ASIC, but I wonder if that's all that's needed, as flipping bit 0 is needed to make the GFX active again? This is from before the boot...
If this is not a fruitful line of investigation, because it may get roadblocked later on...I would appreciate a heads up!!
But it seems such a nice design to have the GPU so close to the CPU, as some calculations could benefit from this.
I'm surprised there are no AMD engineers willing to contribute some insight. I know the APU works fine, when I block the pci slot, it boots normally. Furthermore, when I bought the machine it allowed both to work, but a bios update nobbled it.
This is what I have so far.
1) enabled the interrupts (bit5->0)
2) set cacheline word size (1)
3) reset StrapBitF064BarDisA, StrapBitIO64BarDisA and StrapBifDoorbell
4) set StrapBifRegApSize (256M)
5) set gfx mem base, doorbell.
It is possible the radeon is still running , but hidden due to no interrupts, or link connection.
How am I doing? Anyone?