Hi,
I'm studying the AMD ISA to develop a performance estimator. Using kernel analyzer I got the disassembly of a simple kernel, which contains the following instruction
VFETCH R1.xy__, R0.z, fc174 FORMAT(32_32_FLOAT) MEGA(8)
FETCH_TYPE(NO_INDEX_OFFSET)
In both Evergreen ISA and microcode and R700 ISA references I'm not able to find the specification of the VFETCH instruction.
Can you help me?
Hi!
It's documented here -> http://developer.amd.com/sdks/AMDAPPSDK/assets/R600-R700-Evergreen_Assembly_Language_Format.pdf chapter 6. vtx clause
It reads 8 bytes into R1.xy from buffer fc174 offseted by R0.z(in dword units I guess).
Oh, thank you! It seems a shorter documentation respect to the references I mentioned. Is it a complete/partial replacement of the instruction set or an integration of the instruction set described in the R700 references (where vfetch is not mentioned)? (http://developer.amd.com/gpu_assets/R700-Family_Instruction_Set_Architecture.pdf)
Well, let's say that both documentation are ... compact.
I'd suggest you to read the OpenCl programming guide for a good overview of the hardware, and then you can dig deeper and see what instructions those cards can do in a single clock.
Well Just curiosity. Why vfetch is not listed in (http://developer.amd.com/gpu_assets/R700-Family_Instruction_Set_Architecture.pdf)? Was it introduced later?
Thank you!