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[brane222]

I am toying with an idea of rolling my own 2D routines that would be able to leverage particularities of APUs ( shaed memory) to their own advantage.

But for that I need info on how exactly is display being generated and how the data goes through the unit.

I've searched through AMD's publicaly available info and so far have found nothing even remotely similar.

[jtrudeau]

In case you didn't find it, visit: http://support.amd.com/en-us/search/tech-docs

The most reliable is to search by the ID number for the document. There are a lot of similar titles.

·         Kabini/Beema  - BIOS and Kernel Developers Guide (BKDG) for AMD Family 16h Models 00h-0Fh Processors, doc ID is 48751

·         Kaveri/Godavari -  BIOS and Kernel Developer's Guide (BKDG) for AMD Family 15h Models 30h-3Fh Processors, doc ID is 49125

BTW, I generalized this question/answer and turned it into an FAQ. Thanks for asking!

[brane222]

Thanks, but that doesn't seem to cover it.

For example in ( "BKDG for AMD Family 16h Models 00h-0Fh Processors")

either northbridge and graphic unit are mentioned just briefly.

NB has just two pages in chapter 2.8 and whole internal graphic complex

is done equaly briefly in chapter 2.13

I would neet to know exactly how does that thing operate and if L2

serves it data if it has good copy etc. Also wrt to buffer memory tiling

etc.

None of that is present.

BKGD seems to cover just the part needed for BIOS writers for

initialisation at boot.

Dne 27. 02. 2015 ob 21:41 je jtrudeau zapisal(a):

"Is there documentation - register reference for Kabini/Beema and Kaveri/Godavari ?"

To view the discussion, visit: http://devgurus.amd.com/message/1308131#1308131

>

[jtrudeau]

I'll pass that feedback into the docs team. At the moment I don't have a better place to send you.

[bridgman · Accepted solution]

The open source driver support pages usually have the best graphics info - go to the following URL then click "documentation":

http://www.x.org/wiki/RadeonFeature/

The Sea Islands docs should give you a good understanding of the 3D acceleration, although it's probably good to start with the R6xx/7xx Acceleration doc to get the foundation info. I'm pointing you to 3D info because that's what you'll need to use -- we haven't had dedicated 2D acceleration hardware in our GPUs since the R600.

For more details (including register headers for the rest of the chip) you can go to the open source driver trees. The kernel driver is in the upstream Linux kernel at /drivers/gpu/drm/radeon/ (look at cik*) while the userspace code is in the freedesktop.org mesa project (http://cgit.freedesktop.org/mesa/mesa) in the src/gallium/drivers/radeonsi and src/gallium/winsys/radeon folders.

We use the "glamor" acceleration framework in the X driver, which translates 2D drawing requests into OpenGL calls and runs them through the 3D driver, so...

2D accel call => glamor => mesa OpenGL => drivers/radeonsi => winsys/radeon => cik kernel driver => hardware

Hope this helps.