I would like to read the specifications for the memory controller for my RX 480 ASAP. I already read GCN ISA Architecture Manual and the source codes of Linux's AMDGPU driver, but they are not enough. How can I get login credentials to AMD's NDA Portal? I sent emails of inquiry to the AMD Partners Department, but they haven't got back to me yet.
RE: "I already read GCN ISA Architecture Manual and the source codes of Linux's AMDGPU driver, but they are not enough."
I've also studied the AMD GPU documentation and various code examples (on and off over the last few years). I wrote an ISA assembler that I can't yet use because Windows and the AMD lower driver through Mantle only accept AMD IL P-code via DirectX. Based on the Linux code and AMD drivers that I've looked at, my guess was that Linux was a possible solution. But just guessing again, you pretty much have to know what you are doing before you start. Otherwise you are probably better off using one of the off the shelf solutions like OpenCL or similar.
I have been writing kernels in the GCN Assembly both for Windows and Linux for years now. The vanilla OpenCL is simply not an option for my applications as performance is not good enough. I just need more information so that I can tweak memory timings.
"During pipeline creation, shaders are converted to native GPU shader instruction set architecture (ISA) along with the relevant shader state." (Mantle pdf, p 93). "An IL compiler ... translate(s) these shaders into hardware instructions or a software emulation layer. The programmer is advised to adhere in most cases to the syntax restrictions and performance guidelines of the input language." (AMD IL Specification pdf, p 1-1).
The problem is the driver. It does what it wants. You have to experiment your way into optimized code.
On Windows, my guess is the kernel driver(s) need to be replaced or augmented with pass-thru IOCTL's so you either know what it is going to generate or so you can send pre-determined optimized ISA directly to the card. Mantle (and probably also OpenCL) does not appear to allow this; IL intermediate code only.
Because the driver interfaces are not well documented and the GPU BIOS also appears to be incompletely documented, my conclusion was, fixing the problem is either not reasonable or is a long-term multi-person task.
I don't know where you have been in the last several years, but AMD IL has been deprecated long time ago and a very solid GCN assembler has been around for a few years:
All you have to do is to create OpenCL binaries with this wonderful assembler and load them with clCreateProgramWithBinary().
How am I supposed to "tweak memory timings" with a high level function call? It appears to be an endemic problem.
To answer your question, since lower level control of the GPU was not a reasonable option in WinXP 64, I spent the last 3 or 4 years working on CPU software optimizations. As of last night, I can run a full 4k monitor on 5 cores of an 8350 CPU. The GPU is still not a reasonable option. At the time, OpenCL was only available for the APU and not the discrete GPU. Decision time.
So maybe what I am also saying is: what happen to all of AMD's customers? Did they become part of the NDA team?
Thanks for the link to the GCN assembler. In briefly looking through the code, Mateusz did a really nice job.
I believe Mateusz reverse-engineered AMD drivers. Truly impressive stuff.
"How am I supposed to 'tweak memory timings' with a high level function call? It appears to be an endemic problem."
No, you are not supposed to. I wrote a kernel-mode driver for Windows myself. With Linux, it's much easier.
With all due respect, I kept my patience, and nothing happened.
As a result, we had to drop support for AMD graphics cards for the next version of our mining software here at NiceHash.
Could you give an ETA at the very least?
Sorry to hear this. I guess, you were directly communicating with the concerned team for that purpose. Did you check with them? Actually, they can provide you more information about this. If you don't get any reply, please let me know.