Has anyone from AMD (or even from outside) come across this apparent compiler bug in the current fxc? It generates bad code by writing the low DWORD of a double to both the low and high DWORDs when serializing to a UAV.
http://forums.xna.com/forums/t/47792.aspx
The second post has the most compact case, and includes a full VC project. My understanding is that this is a bug in the compiler and not in your driver, as it occurs in REF, and the emitted DX IL is of an extremely funky nature (a suspicious argument in a mov instruction due to a mistaken swizzle).
The bug occurs at seemingly random times.. I'd engineer around it if I could, but I don't know how.
On a side note, how do you get the high 32bits of an integer mul in HLSL? The DX IL imul instruction has a highword slot, and your IL supports IMUL_HIGH.. But I can't find a DX intrinsic to do it.
Thanks dudes.