sgratton,
I'll try to answer your questions, but if I miss something or confuse you, feel free to ask more. On the RV670(Radeon 3870), there are four SIMD's on the card. Therefor the SIMD's are in what is called a simd array, a pipeline can also be considered a SIMD, but should not be confused with the graphics pipeline or compute pipelines. Inside of each SIMD are 16 alu processors, or shader processing units(spu's), grouped into quads. Each of these alu processors are 5 wide scalar processors(or a 4 element vector + 1 scalar), easily labeled as X, Y, Z, W and T. The XYZW are the vector element and the T is scalar. Each SIMD processes 16 elements a cycle over four cycles, giving a granularity of 64 elements on 670. The wavefront size, which is different from chip to chip, is this granularity and all instructions in a kernel are executed on group of elements at the wavefront size. This is why it is bad to have flow control in a shader that has a branching pattern that doesn't match up with the wavefront granularity, part of the wavefront goes down one branch, part of the wavefront goes down the other branch and no optimizations can be done and both branches are executed for all threads. When you decide what your execution domain does, the GPU launches a wavefront for every 64 elements that should be processed. If the final element does not fill a wavefront, it is launched partially full, possibly loosing some performance. When a wavefront is launched, they go in pairs to the SIMD, i.e. thread A and thread B and operate on their respective elements in parallel, alternating between using ALU and Texture clauses.
As for your usage of threads, blocks and groups. These aren't explicitly defined in our current GPGPU paradigm. Although threads are used synonymously with pixels, blocks and groups are not directly mapped to pixel shaders. In the pixel shader paradigm, what is important to keep track of is the wavefront size as this is the execution granularity of your pixels.
Hope this helps with understanding Radeon 3870.