Hi Michael,
This is a long list of "related" questions, so take your time and make yourself some fresh coffee first...
I am reading in the beta1.0 release notes that HD3870 X2 can be used. Please let me clear some confusion, with reference to "amd-cal-readme-win.txt":
1- When you mean dual GPU operations for HD3870 X2, you mean dual cores on only one card. i.e. Can I run two HD3870 X2 with total of 4 cores?
2- It is mentioned that cross fire is needed for the X2, does this apply when we work with single X2 card?
3- It is mentioned that crossfire takes half of the local memory, and at the same time the X2 needs it, which means I will end up with only 512MG total for both cores?
4- I read somewhere that the X2 uses PCI-E gen1 not gen2:
http://www.digital-daily.com/v...deon_hd_3870_x2/print 5- The last version of ACML (v0.1) which I have downloaded says it does not support multiple GPUs. Has that changed for either double HD3870 or double HD3870X2?
6- Do we have control from Brook or CAL to control which card of the two (or which of the cores on the X2) the CPU selects for stream write/read?
7- For the spider platform using 790FX, is the 16X HT3.0 mapped using a switch to only one of the PCI-E2 16x slots at a time, or can I map for example to two 8X lanes on the HT and send simultaneously to both PCI-E2 slots on 8x each? A related question is if we can communicate with the GPUs on 8X instead of 16x lanes?
All these questions are related to trying to develop a mathematical model for the data flow: both latency and throughput, and to make an educated decision on when for example to make a calculation on a quad core and not GPU
Thank you
Amr