This isn't "Exclusive" to the VIA C3 Series., but Cyrix Processors as a whole... said functionality is more specifically a Driver Developer "Quick Access" within the ARM Architecture (which Cyrix used) and is *supposed* to be disabled on Retail Processors (via a soldered jumper,. as was common for Processors at the time).
Intel and AMD (to my recollection) never had such features in their x86 Architecture, as well it was unnecessary as they didn't actually provide Embedded Solutions however you'll find similar features (disabled, although can be re-enabled via jumper connections) on ARM, PA-RISC, M88K and (SP)ARC Processors that were common for embedded solutions such-as Aviation, Automotive, Medical, etc.
Some Coldfire (M68K) also had said feature as well, although this is specifically on their Processors not the 68K Architecture as it never had Hardware Security., Root Access was always present and needed to use a Software Hypervisor (typically done via Bootloader ROM).
I'd argue using an FPGA "Gateway" Processor/ROM would be a far better solution... as it could just as easily be a Socketed Processor, that could be Reprogrammed / Updated, but via manually removing and flashing said update.
This would come with the benefits of essentially requiring any malicious attacks to be carried out "On Site"; which it's much easier to stop someone who is physically present and detectable... the second would be the ease and lower cost of resolving security issues that do occur; and as all the security could be handled by the Gateway Processor with it tagging and authenticating access requests this means that the CPU / GPU Operations wouldn't be able to simply "Bypass" for Optimisation, instead they could have whatever optimisations they like provided they have privilege to said data access.
It would also open up the opportunity for entirely custom solutions per site / business., none of which would interfere with the performance for Home Consumers, where said features are going to be utilised far less often simply allowing the Processor to run relatively Natively.
There's a weird fascination to attempt to put *everything* on to a Single Chip, as opposed to keeping certain elements Compartmentalised., resulting in Greater Complexity per Chip and thus more potential for Flaw / Exploits to exist.
