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richardw
Journeyman III

FPU performance on poor code

Which is the highest theoretical FLOP/(cycle*core) rate on EPYC processors when not using vectorization and FMA, for example when using x87 instructions or SSE instructions utilizing only the first value?

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Anonymous
Not applicable

Hi richardw,

With EPYC processors, SSE or AVX, scalar non-fma you can do 2 mul's + 2 add's per cycle for a total of 4 per cycle.