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grey9305
Journeyman III

About HSA Linux kernel driver

Hi all,

I have several questions related to the support of HSA linux driver.

1. Does Linux kfd v0.6.1 driver support HSA runtime API defined in the spec?

2. Is there any tutorial on how to use the kfd driver? For example, how to write a  HSA user program like OpenCL and how to compile kernel program into HSAIL BRIG?

3. Does AMD plan to support HSA feature for discrete GPU in the near future? Or just focuses on APU for now?

Sorry for so many questions. I'm a graduate student trying to find some possible research topics related to HSA and hoping to find an experimental platform for testing.

Thank you very much.

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1 Solution

Hi Brian,

1. PCIe 2.0  has an extension for atomic ops which would enable platform atomics for dGPUs.

2. It is possible to work in a coherent fashion between CPU and dGPU (at worst you can always disable the GPU's caches ).


Thanks,

Tom.

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4 Replies
gabbayo
Adept II

Hi,

>> 3. Does AMD plan to support HSA feature for discrete GPU in the near future? Or just focuses on APU for now?

We can't commit to specific development plans yet (so don't go buying hardware based on this answer) but yes we intend to support dGPU. Note that:

(a) the dGPU will need to be used with an AMD APU in order to have IOMMUv2 functionality

(b) system memory accesses will need to go through the PCIE bus which may have performance implications for large data structures

For question 1 & 2, I redirected them to the relevant people in the HSA runtime team.

Oded

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Thank you very much for your reply.

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gabbayo wrote:



Hi,


>> 3. Does AMD plan to support HSA feature for discrete GPU in the near future? Or just focuses on APU for now?



We can't commit to specific development plans yet (so don't go buying hardware based on this answer) but yes we intend to support dGPU. Note that:


(a) the dGPU will need to be used with an AMD APU in order to have IOMMUv2 functionality


(b) system memory accesses will need to go through the PCIE bus which may have performance implications for large data structures



For question 1 & 2, I redirected them to the relevant people in the HSA runtime team.



Oded


Oded,

I know you can't comment on specifics. But how does AMD plan to implement system atomic and cache coherency with discrete GPU? Does PCIe support those features? This seem to contradict the comments from Phil Rogers (HC25-T1: Heterogeneous System Architecture - YouTube)  Or are you saying that dGPU will support some subset of HSA?


Brian

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Hi Brian,

1. PCIe 2.0  has an extension for atomic ops which would enable platform atomics for dGPUs.

2. It is possible to work in a coherent fashion between CPU and dGPU (at worst you can always disable the GPU's caches ).


Thanks,

Tom.

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