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vepa
Journeyman III

Info about CPU--GPU interaction "under the hood"?

Hi,

Can you recommend any documentation about CPU--GPU interactions as they happen in assembly-language level?  Traditionally the communication goes via the system bus (such as PCI Express) but these APU/HSA systems those are obviously more tightly bound -- yet I guess the driver interfaces are designed to provide uniform access to the graphics subsystem for both cases.

Anyway, the point is to get the low-level info, minimizing any obscuring software layers over the hardware.

Thanking for any constructive hints,

Vesa

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