The HSA ( amd, arm, samsung, imagination, etc... ) spec v0.95 is out officially.
Download it here https://hsafoundation.box.com/s/m6mrsjv8b7r50kqeyyal
So now the big question... Is OpenCL dead?
And, btw, I think the kernel precompilation and external linkage is pretty cool
But a conceptual question... why not better a revolutionary parallel C++ approach instead? You just copied the OpenCL model and added some things
No OpenCL is not dead but not every developer wants to program in OpenCL to take advantage of heterogenous computing processing power. The release of the PRM means that HSA is open for others to adapt higher languages and broaden the appeal of HSA. In addition, the HSAIL PRM makes it possible to include FPGA's and other processers types in the mix of compute engines available to developers. The release of the PRM has to potential to open many doors which have been previously closed to developers enabling them to use the right compute engine for the task at hand instead of being bottlenecked by compute limitations which exist today.
Bob, so on HSA systems e.g. Kaveri, a clEnqueueBufferRead and clEnqueueBufferWrite will more or less just be no-ops (assuming the device is the APU, and not discrete GPU)? Seems to be the obvious implication, but would like to sanity check my understanding of what this all means. TIA
clEnqueueRead/Write can't be no-op as it will always copy. no-op can be clMap/Unmap.
No native support for double4
OpenCL is still the standard for programming heterogeneous systems.
However, HSAIL can extend this to other programming languages as well.
Also, HSA compliant boards - as I understand - will need to comply to HSA spec providing a unified address space which makes copies redundant.
But what's the point of HSA having OpenCL's SPIR?
HSAIL is much closer to the GCN architecture than OpenCL (including it's binary representation).
AMDIL is at the level of VLIW architecture, I think it will be replaced with HSAIL in a few years.
Some of the GCN features it supports:
- true functions, not just dumb inlines. And things derived from this -> function pointers, goto to anywhere in memory, jump tables.
- Shuffling between the registers of adjacent 4 workitems.
- Complicated workitem synchronization.
And don't forget it's AMD's own intermediate language, just like amd_IL and it's not just for OpenCL but also for graphic kernels (HLSL, GLSL, ARB shaders).
Well OpenCL and HSAIL are for different purposes. HSAIL is a low-level IL and meant mostly as a compiler target. I expect that AMD's OpenCL implementation will generate HSAIL for HSAIL compliant targets, potentially replacing their OpenCL- > LLVM -> AMD IL -> ISA with OpenCL -> LLVM -> HSAIL -> ISA toolchain. You may also see someone (potentially AMD itself) implement C++ AMP to HSAIL compiler and there are people working on compiling languages like Python to HSAIL as well.