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bubu
Adept II

Standard Portable Intermediate Representation (SPIR)

What are your plans for the Standard Portable Intermediate Representation SPIR ( OpenCL portable and vendor-independent IL ).Do you plan to update your SKA tool with it+

Just curious.

If you don-t know whats SPIR, take a look to

http://www.khronos.org/registry/cl/specs/spir_spec-1.0-provisional.pdf

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bubu
Adept II

I must say we're very excited about that.

FINALLY Khronos undestood no commercial app would use OpenCL if they have to release the kernel source code.

So, are you going to create some kind of CUDA-like nvcc.exe/DirectX fxc.exe compiler to allow us to precompile our kernels into an intermediate language finally, yay?

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Kernel analyzer 2 have option for precompiling.

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But I bet not SPIR, just CAL/Radeon IL.

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Your bet would be correct at the moment since SPIR was just added as an extension in the update to OpenCL 1.2.  Hopefully a new driver/sdk will be released soon to add support for this and several other goodies in the update.

[EDIT]

As of Catalyst 12.10 and the just released APP SDK 2.8, SPIR is not supported, at least on my AMD CPUs and GPUs.  Since the SDKs are released around twice a year, you'll probably be waiting a bit longer.

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bubu
Adept II

So... how's going the SPIR implementation? We're very excited about it here because our company is using CUDA because we don't want to distribute our sources ...

thx

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AFAIK these are the contents of an AMD OpenCL ELF image:

- OpenCL source code

- LLVMIR - it's the ocl source compiled/preoptimized into a binary representation

- AMD_IL - it's generated from LLVMIR (you called it Radeon IL), it is in text, not binary. It's targeted to specific hardware.

- EXE - the old CAL ELF image, compiled and optimized from the previous AMD_IL section. It's a standalone elf image, can be used in CAL directly.

    The EXE section contains 2 subsections:

    - AMD_IL binary representation.

    - ISA microcode that can be uploaded to the hardware as it is.

I think, the functionality you want can be done with the LLVMIR section:

- There will be no OpenCL source in the file.

- Also it will be hardware independent.

Just compile the kernel with "-fno-bin-source -fbin-llvmir -fno-bin-amdil -fno-bin-exe" parameters, and it will contain only a binary LLVMIR section.

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>>Just compile the kernel with "-fno-bin-source -fbin-llvmir -fno-bin-amdil -fno-bin-exe" parameters, and it will contain only a >>binary LLVMIR section.

The point of SPIR is that will be also compatible with NVIDIA and Intel. Propably the LLVMIR that AMD is using is not really compatible with latest LLVM-SPIR branch,

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but it should be compatible across different AMD GPU devices so you don't need provide binary kernel for each of them.

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bubu
Adept II

Any progress on this, pls, AMD?

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just found out that new catalyst 14.1 beta drivers expose cl_khr_spir extension.

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I confirm this (see last extension bellow). Does this mean that SPIR is already implemented in the AMD driver?


  Platform Name:                                 AMD Accelerated Parallel Processing


Number of devices:                               2


  Device Type:                                   CL_DEVICE_TYPE_GPU


  Device ID:                                     4098


  Board name:                                    AMD Radeon HD 7700 Series


  Device Topology:                               PCI[ B#5, D#0, F#0 ]


  Max compute units:                             8


  Max work items dimensions:                     3


    Max work items[0]:                           256


    Max work items[1]:                           256


    Max work items[2]:                           256


  Max work group size:                           256


  Preferred vector width char:                   4


  Preferred vector width short:                  2


  Preferred vector width int:                    1


  Preferred vector width long:                   1


  Preferred vector width float:                  1


  Preferred vector width double:                 1


  Native vector width char:                      4


  Native vector width short:                     2


  Native vector width int:                       1


  Native vector width long:                      1


  Native vector width float:                     1


  Native vector width double:                    1


  Max clock frequency:                           820Mhz


  Address bits:                                  32


  Max memory allocation:                         685349273


  Image support:                                 Yes


  Max number of images read arguments:           128


  Max number of images write arguments:          8


  Max image 2D width:                            16384


  Max image 2D height:                           16384


  Max image 3D width:                            2048


  Max image 3D height:                           2048


  Max image 3D depth:                            2048


  Max samplers within kernel:                    16


  Max size of kernel argument:                   1024


  Alignment (bits) of base address:              2048


  Minimum alignment (bytes) for any datatype:    128


  Single precision floating point capability


    Denorms:                                     No


    Quiet NaNs:                                  Yes


    Round to nearest even:                       Yes


    Round to zero:                               Yes


    Round to +ve and infinity:                   Yes


    IEEE754-2008 fused multiply-add:             Yes


  Cache type:                                    Read/Write


  Cache line size:                               64


  Cache size:                                    16384


  Global memory size:                            802160640


  Constant buffer size:                          65536


  Max number of constant args:                   8


  Local memory type:                             Scratchpad


  Local memory size:                             32768


  Kernel Preferred work group size multiple:     64


  Error correction support:                      0


  Unified memory for Host and Device:            0


  Profiling timer resolution:                    1


  Device endianess:                              Little


  Available:                                     Yes


  Compiler available:                            Yes


  Execution capabilities:


    Execute OpenCL kernels:                      Yes


    Execute native function:                     No


  Queue properties:


    Out-of-Order:                                No


    Profiling :                                  Yes


  Platform ID:                                   0xb7446660


  Name:                                          Capeverde


  Vendor:                                        Advanced Micro Devices, Inc.


  Device OpenCL C version:                       OpenCL C 1.2


  Driver version:                                1411.4 (VM)


  Profile:                                       FULL_PROFILE


  Version:                                       OpenCL 1.2 AMD-APP (1411.4)


  Extensions:                                    cl_khr_fp64 cl_amd_fp64 cl_khr_global_int32_base_atomics cl_khr_global_int32_extended_atomics cl_khr_local_int32_base_atomics cl_khr_local_int32_extended_atomics cl_khr_int64_base_atomics cl_khr_int64_extended_atomics cl_khr_3d_image_writes cl_khr_byte_addressable_store cl_khr_gl_sharing cl_ext_atomic_counters_32 cl_amd_device_attribute_query cl_amd_vec3 cl_amd_printf cl_amd_media_ops cl_amd_media_ops2 cl_amd_popcnt cl_khr_image2d_from_buffer cl_khr_spir


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Interesting! Now we just need the clc.exe to precompile our code

I'm not sure if the precompiler app will be done by Khronos or directly by the IHVs like AMD, NVIDIA or Intel in their OpenCL SDKs.,,

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