Originally posted by: mahadevan Hi Gurus,
I have one doubt. Is the HD5750(or any HD5xxx series GPUs) are pure SIMD processors. Typically a SIMD has following definition (taken from OpenCL specifications document): SIMD: Single Instruction Multiple Data. A programming model where a kernel is executed concurrently on multiple processing elements each with its own data and a shared program counter. All processing elements execute a strictly identical set of instructions. That means all the cores will share same program counter. Is that right in the HD5xxx series GPUs? |
Correct: in 5xxx SIMD cores are grouped into SIMD engines (termed "processing elements" in OpenCL), and every SIMD engine has its own P.C. shared among its SIMD cores (maybe things are actually more complicated at the hardware level, but the general idea you have to keep in mind is this).
| If all the cores share the same program-counter, how is is possible to run some if-branch code (with varying data input to each core) on the GPU? |
In theory, if a divergence (regarding the execution flow) is spotted inside a thread group (so, inside a SIMD engine) after a control flow instruction, then the hardware will execute sequentially both possibile branches for every thread of the group; after this, for every thread will be considered only the "valid" path (i.e., the one which respects the condition imposed by the control flow instruction).
This is the main reason behind the fact that, when you program on GPUs, it's very important to avoid control flow instructions which tend to diverge the execution flow among threads many times, whenever possibile. Another important thing is to unroll loops, if possible.
Obviously these are not easy (nor realistic, sometimes) tasks most of the times, but can give you dramatic performance improvements.
