I'm fairly certain that the MOV instruction is between registers only, like in most (if not all) ISAs, that's why most ISAs also include load/store instructions.
Originally posted by: eduardoschardong ryta, x86 and some other CISC ISA for CPUs can move between memory and register, many can also add, sub, shl, etc.
But denat, that's not the case for GPUs, for AMD GPUs loads and stores from memory must go in a diferent clause.