Exactly three years ago we announced a six-year goal to dramatically improve the energy efficiency of our processors. AMD’s 25x20 initiative is our vision to improve the energy efficiency of our accelerated processors (APUs) for mobile technology devices by 25x from a 2014 baseline. We’ve done tremendous work to date. We’ve developed new processor architectures, power efficient technologies, and power management techniques all toward the goal of accelerating energy efficiency of not only our APUs, but also of our compute processors (CPUs) and graphics processors (GPUs). Let’s look at the results so far.



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At the three-year halfway point, we’ve launched two new products (6th and 7th Generation AMD  A-Series APUs) for mobile products, with the next generation Ryzen™ Mobile to follow in the second half of 2017. Since 2014, we have achieved a nearly 4x improvement in energy efficiency, placing AMD ahead of pace to achieve our 25x20 goal1.


Achieving these substantial improvements in energy efficiency over several years, and associated reductions in the carbon footprint of our products, required broad and deep innovation. We’ve designed and implemented many new capabilities into our processors over this time. For example, Heterogeneous Unified Memory Access (hUMA) allows the CPU and GPU to directly access the same memory as peers instead of requiring all access to go through the CPU. This hUMA has led to as much as 17 times boost in performance for certain features when using the GPU’s parallel processing in concert with the CPU2. But, because it’s a shared power/thermal infrastructure, the power demands are equivalent to using the CPU alone.


Another significant AMD innovation is adaptive voltage and frequency scaling. This scaling involves the implementation of unique, patented silicon speed capability sensors and voltage sensors in addition to traditional temperature and power sensors. Silicon speed capability and platform voltage control can vary significantly part-to-part and platform-to-platform. The speed and voltage sensors enable each individual processor to adapt to its silicon characteristics, platform behavior, and operating environment. By adapting in real-time to these parameters, the processor can dynamically optimize its operation for maximum efficiency.


These innovations and the many other technologies we’ve created and implemented over the last three years are substantive and foundational engineering work. Our efforts have been widely recognized too, having received multiple awards worldwide from prestigious organizations.


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When we think about these recognitions in terms of customer experience, we’re honored by these awards from the technology and energy efficiency communities. The excellent engineering, progress towards the goal, and public accolades show that we are on the right path. AMD remains committed to the 25x20 goal, and will continue to leverage our portfolio of intellectual property around architectural innovation, power-efficient technology, and power management techniques.


However, the best is yet to come. The 25x20 results so far have come from our 28nm products. We anticipate a strong improvement in performance per watt by moving to a 14nm FinFET process. We will launch our Ryzen Mobile APU built on this process in the second half of 2017. What’s more, we’re not resting on the design front. We are adding more power management with a suite of power reduction techniques called Pure Power. In Ryzen Mobile, we are estimating an increase in CPU performance of up to 50 percent, and graphics over 40 percent, with a cut in power use of up to 50 percent.


At the halfway point, we are on track to achieve 25x20. I’m very happy with what we’ve done to advance energy efficiency and achieve this position, and very excited about the innovation still to come. Creating differentiated low-power products remains a key element of our business strategy. We will continue to report on our progress toward achieving the 25x20 energy efficiency goal, as we strive to bring customers the benefit of industry leadership.



Mark Papermaster is CTO and SVP for Technology & Engineering at AMD. Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied. 


[1] Typical-use Energy Efficiency is defined by taking the ratio of compute capability as measured by common performance measures such as Cinebench and 3DMark 11, divided by typical energy use as defined by ETEC (Typical Energy Consumption for notebook computers) as specified in Energy Star Program Requirements Rev 6.1 10/2014. “Kaveri” represents the baseline of relative compute capability (1.0) and relative energy efficiency (1.0). 6th Generation APU "Carrizo” relative compute capability (1.23) divided by relative energy efficiency (0.35) equals 3.5X improvement over “Kaveri”. 7th Generation APU “Bristol Ridge” relative compute capability (1.36) divided by relative energy efficiency (0.34) equals 3.95X improvement over “Kaveri”. Testing conducted by AMD Performance labs on optimized AMD reference systems. PC manufacturers may vary configuration yielding different results. An equal blend of Cinebench R15 CPU performance score and 3DMark11 GPU performance score is used to represent APU performance. In order of Cinebench / 3DMark11 scores, Kaveri scored 232/2142, Carrizo scored 277/2709, and Bristol Ridge scored 279/3234.


[2] Footnote 17 in http://www.amd.com/Documents/energy-efficiency-whitepaper.pdf