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Developers traveling to Boston for the Red Hat Summit, one of the industry’s premier open source technology events, are in for a treat! They will get a sneak peek at some exciting new 64-bit ARM® development platforms featuring the AMD Opteron™ A1100 Series processor (codenamed “Seattle”). 

 

How would you like an affordable and compact 160x120mm board to jump start your development efforts with AArch64? AMD and Linaro have been collaborating to develop a 96Boards Enterprise Edition (EE) specification that is ideal for the individual developer. Targeting the server and networking markets, the board will feature a 4-core AMD Opteron A1100 Series processor with two SO-DIMM memory slots, PCIe®, USB, SATA, and Gigabit Ethernet capabilities. Popular operating systems such as CentOS, Fedora, and Red Hat Enterprise Linux Server for ARM Development Preview are targeted for use with this particular board. Additional software downloads, updates, and a forum for software developers will be available via the 96Boards web site. The board is slated to be available in 2H 2015 from distribution partners worldwide and it will be supported through the Linaro Enterprise Group’s 96Boards.org site.

 

If you are looking for a more traditional server-type development environment, AMD is also showcasing a sleek 1U half-depth rack mount developer system by SoftIron, an enterprise technology innovation company based in the UK. This system, which targets more robust development and application testing environments, will be running proof-of-concept demos during the Red Hat Summit of Hadoop big data framework and the Ceph storage platform on the just announced Red Hat Enterprise Linux Server for ARM Development Preview. The SoftIron system features an 8-core AMD Opteron A1100 Series processor, two 10 Gigabit Ethernet ports, 8 SATA3 ports, 8 lanes of PCIe Gen3, and advanced memory characteristics. Systems are scheduled to be available from SoftIron in 2H 2015. SoftIron is dedicated to developing next generation enterprise computing products and has been collaborating with AMD on low power, highly efficient platforms that utilize the AMD Opteron A1100 Series processor.

 

Red Hat has a long track record of developing open source software and driving standards for 64-bit ARM architecture in a collaborative and transparent environment. The Red Hat Summit will feature several sessions focused on ARM technology including Developing Red Hat Enterprise Linux for 64-bit ARM: Platform standardization for customer success by Jon Masters and Yan Fisher on Wednesday, June 24.

 

We are excited about the role the AMD Opteron A1100 Series processor is playing in accelerating the 64-bit ARM server ecosystem. The upcoming 96Board EE and SoftIron development platforms are the perfect vehicles for broadening development activities. Come see for yourself - these platforms are on display at Red Hat Summit at the AMD booth (1220) and ARM booth (1216).

 

Michael Detwiler is a Product Marketing Manager for the AMD Server Business Unit. Links to third party sites, and references to third party trademarks, are provided for convenience and illustrative purposes only. Unless explicitly stated, AMD is not responsible for the contents of such links, and no third party endorsement of AMD or any of its products is implied.

AMD is proud to support the new 15-inch MacBook Pro with Retina Display by delivering the discrete graphics power for editing video, rendering 3D images and for playing high-resolution games while providing up to 80 percent faster performance1.

 

Building upon our product innovation in support of the Mac Pro and iMac with Retina 5K display, AMD is delighted to support Apple again as it drives the next generation of visual performance. The AMD Radeon™ R9 M370X offers a new amplified level of graphics and visual acuity including high resolution external display support.


MacBook Pro.jpg

 

Photo courtesy of Apple

 

As highlighted in the Apple announcement, AMD Radeon R9 M370X in the new 15-inch MacBook Pro with Retina display supports the 2880-by-1800 internal display and the ability to support multiple high resolution external displays, including panels with 5120-by-2880 resolutions at 60Hz. The AMD Radeon™ R9 M370X features 2GB of GDDR5 memory, also helping to enable dual display support.

 

With industry-adopted OpenGL support, the AMD Radeon R9 M370X is built on the strength of award-winning AMD Graphics Core Next architecture – conceived from the ground up to intelligently manage rendering and compute workloads. AMD Radeon GPUs support OpenGL and OpenCL™– supported by both Apple and AMD – to deliver exceptional professional graphics performance.

 

Learn more about the new 15-inch MacBook Pro with Retina display.

Learn more about the performance of the new 15-inch MacBook Pro with Retina Display

Learn more about AMDRadeon R9 M370X

 

 

Matt Skynner is the corporate VP and general manager, products, Computing and Graphics Business Unit at AMD Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied.

 

 

AMD, the AMD Arrow logo and Radeon are trademarks of Advanced Micro Devices, Inc. Other names are for informational purposes only and may be trademarks of their respective owners.

 

1Testing conducted by Apple in May 2015 using preproduction MacBook Pro with Retina display configurations. For more information visit www.apple.com/macbook-pro/features-retina/.
http://www.apple.com/pr/library/2015/05/19Apple-Introduces-15-inch-MacBook-Pro-with-Force-Touch-Trackpad-New-1-999-iMac-with-Retina-5K-Display.html

sage_logo.pngSage Electronic Engineering, has released an updated SageBIOS™ Board Support Package (BSP) for AMD’s 2nd Generation Embedded R-Series APUs (previously codenamed “Bald Eagle”) as well as a demonstration boot ROM image for evaluation on the Lamar (DB-FP3) development board.

 

The demonstration boot image is released in an Open Source Package (OSP), including coreboot® and SeaBIOS open source files and a packaged software solution for flashing the SPI memory. SageBIOS BSPs are routinely updated and tested to accommodate changes in the binary images supporting open source development, quality updates, and reintegration of improved open source files and validation with multiple distributions of Windows®, Linux®, DOS and RTOS.

 

“We believe this SageBIOS BSP is ideal for embedded solutions, as it can be customized to reduce both boot times and the firmware footprint,” said Scott Hoot, president of Sage. Sage is an Embedded Software, Solution and Tool Partner with AMD, offering substantial experience in AGESA open source files and virtualization binaries.

 

Made for embedded applications, the AMD 2nd Generation R-Series APUs (Accelerated Processing Units) are aimed at bringing 4K quality displays to gaming machines, medical imaging devices, digital signage, industrial control and automation machines, and communications and networking infrastructure systems that are increasingly relying on compute and graphics processing technology.

 

SageBIOS supports most modern x86 platforms from AMD with a combination of open source (including coreboot®) as well as proprietary firmware solutions. Sage Custom BSPs are ported to customer hardware designs to add feature sets such as code reduction, fast boots and enhanced security.

 

About Sage:

Sage Electronic Engineering, LLC, of Longmont, Colo. (www.se-eng.com), provides customized Board Support Packages marrying open source (including coreboot®) solutions with proprietary software, creating streamlined boot solutions that also create flexibility in application. Sage partners with processor manufacturers, including AMD, to provide coreboot solutions for the open source community, as well as developing SageBIOS™ BSPs for customers desiring the flexibility of open source firmware stripped of unnecessary code and backed by rigorously tested, validated and supported solutions.

Contact: dennis.batchelor@se-eng.com; 303-495-5499

 

Dennis Batchelor is the VP Marketing for Sage Electronic Engineering. His postings are his own opinions and may not represent AMD’s positions, strategies or opinions. Links to third party sites, and references to third party trademarks, are provided for convenience and illustrative purposes only. Unless explicitly stated, AMD is not responsible for the contents of such links, and no third party endorsement of AMD or any of its products is implied.

It’s always a great day when we can talk about our successful technology partnerships in the thin client space, and today is a great day! I’m happy to report that the AMD G-Series SoC has just been incorporated into the latest thin client designs from Hewlett-Packard, the mt245 and t420. The thin clients make use of dual- and quad-core AMD System-on-Chip (SoC) parts that couple high performance compute and graphics capability in a highly integrated low power design. The SoCs improve data transfer rates and save space on the motherboard, which makes them a perfect fit for the compact form factors required by thin clients.

 

These wins build on the strong momentum we’ve seen for thin clients, offering another example of our leadership and number one share in a market that continues to grow, becoming more and more prevalent in commercial installations around the world.  

 

Thin clients offer many advantages to companies needing robust, energy efficient functionality with a small footprint. The units are well suited to a variety of industries including education, healthcare, large enterprise and call centers. They are also ideal for task workers and for industrial applications in rugged environments. By depending on a remote server for computation, thin clients are also very good for remote workers who need full PC capabilities.

 

The AMD G-Series SoCs are part of the Embedded G-Series of high-performance, low-power parts built to handle embedded applications. The processors combine graphics computing engines with x86-based central processing cores in the same accelerated processing unit (APU) design. They provide advanced levels of power efficient graphics and compute capabilities in the market.

 

AMD provides thin client solution designers the flexibility to create scalable, low-cost and power efficient x86 based products, while integrating a rich mix of IO into their systems without compromising performance, software compatibility, or features. “The AMD G-Series SoC provides HP thin clients with enhanced security, value and unmatched performance," said Jeff Groudan, worldwide director of HP's Thin Client product management team.

 

AMD thin client solutions are gaining more attention today with the move to cloud-based computing. Increasingly, thin clients are being used for more complex and higher performance tasks. This is especially true for devices incorporating x86 CPUs and sophisticated graphics. The surge of innovation in the desktop virtualization market has created new opportunities for powerful thin clients. Leveraging technologies such as multimedia redirection to take advantage of the hardware accelerators in the AMD G-Series SoCs, thin clients are now capable of executing demanding tasks including computer-aided design and 3D modeling. Other technologies now being deployed in thin clients, such as Power-over-Ethernet, also create new opportunities supporting a less cluttered, more space efficient deployment model.

 

I expect these trends will continue for the foreseeable future as demand grows for higher graphics and compute needs coupled with requirements for lower total cost of ownership and reduced energy consumption. The future is bright for AMD-based thin clients.

 

Stephen Turnbull is Director of Thin Client Vertical, AMD Embedded Solutions. Links to third party sites, and references to third party trademarks, are provided for convenience and illustrative purposes only. Unless explicitly stated, AMD is not responsible for the contents of such links, and no third party endorsement of AMD or any of its products is implied.

The remarkable performance advances in computing since the birth of the modern microprocessor can be largely attributed to Moore’s Law—the doubling of the number of transistors on a chip about every two years as technology advances allow for smaller transistors. What’s lesser known is that these advances have been accompanied by corresponding improvements in energy efficiency.

However, the energy-related benefits of Moore’s Law are slowing down as the miniaturization of transistors are now bumping against physical limits. This has forced the industry to consider alternative ways to improve processor performance and efficiency. With the development of new processor architectures, power efficient technologies, and power management techniques, AMD has its sights set on the goal of accelerating energy efficiency of its Accelerated Processing Units (APUs) 25x by 2020 (25x20).

With this 25x20 goal, the reduced power consumption of AMD’s products will outpace the historical efficiency trend predicted by Moore’s Law by at least 70 percent from 2014 to 2020. This means that in 2020, a computer could accomplish a task in one fifth of the time as a 2014 PC while consuming, on average, less than one-fifth the power. The following explains how AMD is working to achieve this goal. More details on the information in this blog and more can be found in a new white paper: AMD’s Commitment to Accelerating Energy Efficiency.

 

Architectural Innovation

AMD’s APUs place both CPUs and GPUs on the same piece of silicon. This yields better efficiency by sharing the memory interface, and improves both power delivery and the cooling infrastructure. Many workloads, such as natural human interfaces and pattern recognition, benefit from the parallel execution capabilities of the GPU. Optimizing concurrent GPU and CPU operation delivers maximum performance, allowing a compute device to finish the task earlier and ultimately save power.

With Heterogeneous Systems Architecture (HSA), the CPU and GPU within the APU execute as peers. Added to this, AMD’s Heterogeneous Unified Memory Access (hUMA) enables the CPU and GPU to use the same memory, which has the added benefit of making coding far easier and overcoming a major hurdle for parallel programming. These capabilities reduce the handoffs between CPU and GPU, and reduce the number of instructions required to complete a task, thus saving power.

 

Power Efficient Silicon Technology

At the circuit level, a number of innovative approaches are used to help maximize the efficient use of silicon.  One of these involves reducing the average voltage for a given frequency of operation. This is a big lever since power reduces with the square of voltage.   To accomplish this, specialized integrated detectors observe a voltage dip and temporarily reduce the frequency in less than a nanosecond.  When the voltage excursion has passed, full frequency is restored. Since these excursions are rare, there’s almost no compromise in computing performance, while power is cut by 10 to 20 percent.

Another innovation is Adaptive Voltage and Frequency Scaling, which involves the implementation of patented silicon speed capability and voltage sensors in addition to traditional temperature and power sensors. The new sensors will enable each APU to adapt to its particular silicon characteristics, platform behavior, and operating environment. By adapting in real time, the APU can optimize for maximum efficiency, squeezing up to 20 percent power savings at a given performance level.

To further reduce power use on the CPU, AMD has leveraged a high-density library similar in design style to a GPU. Using a high-density library can save power and area by 30 percent, and also frees-up space allowing AMD to place the GPU, a multimedia processor, and the system controller on the same chip.

 

Power Management

AMD has designed power management algorithms focused on optimizing power for typical use conditions. These include a number of race-to-idle techniques to put a computer into sleep mode as quickly as possible thereby saving valuable energy that was previously wasted. By monitoring performance demands and coordinating activity between all components on the chip so all the work can be completed quickly, the power manager can put the processor into idle mode as frequently as between frames of a video playback or keystrokes while typing.

AMD’s power management also monitors the temperature of the silicon and the end-user machines. With this understanding, the APU can briefly increase the power output during compute-intensive jobs for much better response time while still avoiding overheating. Once complete, the power is reduced, lowering the device temperature. This practice helps yield better overall energy efficiency as tasks can be performed quicker and the machine can rapidly shift to idle mode.

Another capability incorporated in recent AMD APUs is around run-time entry of the processor into the extremely low-power “S0i3” state using power gating techniques. By doing this on the fly, the APU can often achieve “standby” equivalent power levels at sub-second time frames. This translates directly to lower average power consumption for typical use conditions.

 

Summary

AMD is committed to the 25x20 goal, and will leverage a portfolio of intellectual property around architectural innovation, power-efficient technology, and power management techniques. Combining these low power capabilities with the efficient hardware acceleration evidenced in recent AMD products, such as that for video, audio and GPU based computation, a path to achieving the goal can be seen.

These innovations are being incorporated into all of AMD’s APU products and will allow its processors to outpace the historical efficiency trend predicted by Moore’s Law by 70 percent between 2014 and 2020, despite the slowdown in silicon improvement.

To read my whitepaper, “AMD’s Commitment to Accelerating Energy Efficiency”, click here: http://www.amd.com/Documents/energy-efficiency-whitepaper.pdf

Sam Naffziger is a Corporate Fellow at AMD responsible for low power technology development, and has been the key innovator behind many of AMD’s low power features.  He has been in the industry 27 years with a background in microprocessors and circuit design, starting at Hewlett Packard, moving to Intel and then at AMD since 2006. He received the BSEE from CalTech in 1988 and MSEE from Stanford in 1993 and holds 115 US patents in processor circuits, architecture and power management.  He has authored dozens of publications and presentations in the field and is a Fellow of the IEEE. Links to third party sites, and references to third party trademarks, are provided for convenience and illustrative purposes only. Unless explicitly stated, AMD is not responsible for the contents of such links, and no third party endorsement of AMD or any of its products is implied.

william_toll_profitbricks.jpgQ&A with William Toll, VP Marketing at ProfitBricks

 

What is ProfitBricks’ mission and how is it playing out in 2015?

 

ProfitBricks is the Cloud Computing IaaS provider that offers painless cloud infrastructure for all IT users. With no learning curve and infrastructure that behaves like on-premises physical servers, storage, and networks, it’s helping IT teams migrate to the cloud painlessly.

 

The momentum for ProfitBricks continues to grow, as Cloud Computing deployments move from early adopter and “cloud natives” to general IT, and managed service providers look for a public cloud that can meet their requirements while not needing to retrain. Our price/performance guarantee, that any workload deployed on ProfitBricks will cost less than the same workload running at the same performance level on the IaaS platforms of major cloud providers, is also welcome relief to cloud providers that have confusing pricing tiers, and poor, inconsistent performance.

 

How has market demand for public cloud services changed from 2010 (when ProfitBricks was founded) to now?

 

The founders of ProfitBricks looked at the state of Cloud Computing in 2010 and saw that users had to adapt to the cloud because the cloud was not flexible, had poor performance, and was not easy to use. ProfitBricks hired a large multi-national team of engineers and started building a second- generation cloud platform. The platform launched in 2013 and received numerous awards and recognition from Gartner, Frost & Sullivan, SIIA, and CRN. The ProfitBricks IaaS Cloud Computing platform solved many of the problems of the first generation of clouds from major cloud providers.

 

But now the market has changed— back in 2010 through 2014, Cloud IaaS was mainly purchased by early adopters, developers, and startups. There have also been some new entrants from traditional IT vendors like Microsoft and newer ones like Google. In general, the market seems to mainly consist of two types of Cloud providers: those that replicate decades of IT business practices and those that only offer the cloud with their professional services.

 

ProfitBricks offers one thing: IaaS. Cloud servers, cloud storage, and cloud networks that offer complete flexibility and high performance and can be configured using our Data Center Designer and/or our APIs and SDKs.

 

The DevOps movement has made infrastructure “sexy.” The plethora of tools (Chef, Puppet, Ansible, SaltStack) and the process changes that continuous integration and deployments have brought are driving developers and operations pros to work together like never before.

 

How does AMD server technology support ProfitBricks’ mission?

 

Our mission is to build out hardware for thousands of customers. That hardware needs to be scalable and repeatable. Our CEO, Achim Weiss, and his technical team are big fans of AMD and Supermicro. We knew that in order to offer a high-performance, flexible cloud-computing product, it was all about CPU cores. And we decided to launch on Supermicro servers featuring multicore AMD Opteron™ processors, and we’ve been exclusively AMD since launch.

 

AMD CPU cores are the engines of the cloud. Now that IT teams can access anywhere between 1 CPU core and 1 GB of RAM to 62 CPU cores and 240 GB of RAM on a physical server—and have access to that server within minutes—all sorts of new workloads are possible. Big data and the move to a digital business are driving a massive increase in the number of servers deployed.

 

ProfitBricks provides the highest price/performance ratio in the public cloud computing space, and similarly, AMD processors provide the best price/performance ratio with the highest core density.

 

What themes are you seeing impact and evolve the datacenter in 2015? What role is ProfitBricks playing in this?

 

We are seeing on-premises data center managers open up to the cloud and wish to find a cloud provider they can work with. The pressure to move from CAPEX to OPEX is growing, and the C-Suite is now pushing for cloud. It’s no longer just IT that will push for a cloud solution. Business leaders value the agility and the new value that IT can provide when they move to cloud infrastructure. 

 

Data center managers that have infrastructure in co-location providers are also considering cloud, while they don’t have the overhead of on-premises data centers (power, cooling, fire suppression, physical security) — they too have a growing need to be more agile.

 

From Big Data to Internet of Things, the need for more IT infrastructure (CPUs, RAM, Storage) and the networks that connect them is growing rapidly, and data center managers are unable to keep up with the requests without turning to the cloud.

 

Data center managers that have deployed DCIM (Data Center Infrastructure Management) tools are also looking for a cloud they can work with. Many of them are not running “DevOps teams” that code against APIs; they are more like traditional IT teams. They are looking for a cloud provider that offers a tool like the ProfitBricks Data Center Designer that offers a visual way to manage multiple data centers.

 

What is the most rewarding part of your role?

 

Knowing that businesses and their IT teams and developers will be more productive, creative, and profitable due to the powerful business results that migrating to the cloud can bring.

 

 

DISCLAIMER

Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied.

 

AMD is not responsible for third party content and does not necessarily endorse the comments made herein.

 

©Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD Arrow logo, Opteron and combinations thereof are trademarks of Advanced Micro Devices, Inc.  Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

According to IDC, “The datacenter must serve as the primary point of engagement and information exchange with employees, partners, and customers in today’s interconnected world.”* This belief has long been the basis for our innovation at AMD and it resonated once again at our 2015 Financial Analyst Day, where our leaders shared a renewed vision and a clear plan to build on our pioneering heritage.

 

Making this happen means bringing competitive solutions back to the datacenter. At the forefront of this is “Zen,” AMD’s completely new high-performance x86 core design. The next-generation AMD Opteron™ processors will be based on the “Zen” core and will include some exciting enhancements, including simultaneous multithreading (SMT) for high throughput, disruptive memory bandwidth, and high native I/O capacity.

 

Our work developing server silicon also includes investments in ARM® Ltd’s 64-bit ARMv8 architecture to encourage innovation in a way not seen since the introduction of AMD64. Our goal? Allow engineers to more efficiently serve key workloads such as web hosting, networking, and cold storage. Delivering on this goal begins with our ARM Cortex®-A57-powered AMD Opteron™ A1100 Series Processors (codenamed “Seattle”). As innovative developers find new uses for “Seattle” and the ARM software ecosystem continues to grow, we will also be honing our next-generation ARM processors, based on the custom “K12” core. While “K12” will leverage many of the advances in our x86 development, how we develop this core will be based on the demands of our ecosystem to balance high performance with real-world efficiency.

 

Complementing advancements in x86 and ARM, we continue to think of revolutionary technologies that will drive datacenter evolution. AMD introduced the APU in 2011, bringing together the CPU and GPU on chip. Now think about AMD bringing APU to the heart of the datacenter. Building on previous advancements, we are focused on driving server technology to support HPC and machine learning leadership through a high-performance APU that lowers the barrier for developers to use GPU acceleration and delivers massive improvements to vector applications with scale-up graphics performance, HSA enablement, and optimized memory architecture.

 

From next generation AMD Opteron and ARM processors to server APU, our datacenter solutions will continue to be the optimal balance of power and performance. We are committed to enabling the ecosystem with differentiated solutions, fostering rapid innovation through an open and partner-friendly approach, and leveraging our strengths in high-performance CPU and GPU to deliver cutting-edge technologies that help our customer push the boundaries.

 

If we had to sum up Financial Analyst Day 2015, it would be that we are the infrastructure for the next wave. As new workloads emerge with shifting performance demands, we are uniquely qualified to answer the call with solutions that optimize your datacenter, satisfy your users, and drive your business forward.

 

 

*Worldwide Datacenter Census and Construction 2014-2018 Forecast: Aging Enterprise Datacenters and the Accelerating Service Provider Buildout (Doc #251830), IDC

 

DISCLAIMER

Links to third party sites are provided for convenience and unless explicitly stated, AMD is not responsible for the contents of such linked sites and no endorsement is implied.

 

AMD is not responsible for third party content and does not necessarily endorse the comments made herein.

 

©Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD Arrow logo, Opteron and combinations thereof are trademarks of Advanced Micro Devices, Inc.  Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.

 

ARM and Cortex are registered trademarks of ARM Limited in the UK and other countries.