People are doing increasingly dangerous things on their computers, in an increasingly dangerous environment. These words succinctly sum up the “why” of AMD’s security strategy, the cornerstone of which is implemented into our recently-announced Low-Power and Mainstream Mobile APUs. In this era of increasingly mobile computing, when consumers and corporations want to use the cloud and have access to their data at any time but al so have that data safeguarded, when companies are allowing their employees to explore “bring your own device” (BYOD) options, and when everyone is dreading the next virus, exploit or hack, we want it all: to have the digital world on demand at our fingertips while being assured of our personal and professional security.
And, while we’re all aware of software solutions to help protect data – after all, who hasn’t seen those pop-ups from time to time – we’re approaching security from a hardware level. Arguably, if the keys exposed in the recent “Heart Bleed” exploit had been secured in hardware instead of memory, Heart Bleed’s flow might have been staunched. Realistically, there are probably two major camps for hardware-based security: proprietary or closed architecture, and architecture based on open industry standards. AMD is a long-time supporter of open standards and thus has opted for the latter, joining the largest security ecosystem in the world: that based on ARM TrustZone® technology.
AMD’s new 2014 Mainstream and Low-Power Mobile APUs (formerly codenamed “Beema” and “Mullins”) feature a first-of-its-kind, AMD-developed platform security processor (PSP) based on the ARM Cortex-A5 featuring ARM TrustZone® technology for enhanced data security , truly bootstrapping the future for our customers and valued end-users. By licensing a Trusted Execution Environment – also known as a security kernel – from Trustonic, we open access to industry-standard APIs for any ISVs who wish to join us. Over this next year, we plan to roll out an AMD-wide product stack for client, server, graphics, embedded and semi-custom businesses based on what we call the AMD Platform Security Processor (PSP). Under the umbrella of AMD Secure Technology, PSP joins other AMD IP innovations from the No Execute Bit to the Secure Asset Management Unit as the future of AMD’s security strategy.
Together with our customers, we have identified use cases and areas of focus to enable ISVs to create complete solutions for the markets we are addressing. Components of these solutions are engineered to work together, while leaving room for our OEM customers to truly differentiate for both consumer- and commercial-grade platform offerings. Some of our security partners have joined with us at industry leadership events such as APU13, the RSA Conference and Mobile World Congress, and their support statement and presentations regarding what they bring to the partnership are available online – especially at developer.amd.com. Over time, we will enable “over the air” several key consumer and commercial experiences, for both the TrustZone technology-capable and non-capable products, with the end goal of bringing all security into the TrustZone capable ecosystem. I’m looking forward to sharing details of those partnerships and solutions in upcoming blogs. It’s our vision that through a hardware-based security strategy built on the open standards of ARM TrustZone technology, AMD will deliver enhanced security options to our customers and partners and help make the increasingly digital lives of end-users less dangerous.
Diane C. Stapley is Domain Business Owner/Alliance Manager at AMD. Her postings are her own opinions and may not represent AMD’s positions, strategies or opinions. Links to third part sites, and references to third party trademarks, are provided for convenience and illustrative purposes only. Unless explicitly stated, AMD is not responsible for the contents of such links, and no third party endorsement of AMD or any of its products is implied.
Click here to view the full deck describing the security features of AMD's 2014 Low-Power and Mainstream APUs